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Memory-Presence Determination



  Memory-Presence Determination

SIMMs/DIMMs that are not clearly labeled cannot be identified other than by part number.

(For MEMORY component define, you will have the need to know about 70 or more timing/temperature parameters. Because this information will not fit on a SIMM / DIMM normally only P/N / Speed and Size is printed on a small Label).


SIMM Identification (Single Inline Memory Module)

72-pin memory SIMMs are usually marked with a label that shows the size and speed (e.g. 1Mx32, 60ns). To determine the SIMM capacity from the above example, divide 32-bits by 8 (1-byte) and multiply this result by 1M, hence, SIMM = 4MB (SIMMs prefix -6R = RAS max. 60ns and Reduced CAS-timing (-2ns) appr. CAS = 19ns)
XMx32 is Non parity  and XMx36 is Parity .


DIMM Identification (Dual Inline Memory Module)

168-pin memory DIMMs can be usually identified by the information on the chip modules. (e.g. 2Mx64, 60 ns, EDO). To determine the DIMM capacity from this example, divide 64-bits by 8 (1-byte) and multiply this result by 2M, hence, DIMM = 16MB
XMx32 is Non parity  and XMx36 is Parity .


PC100 DIMM Identification (100MHz Dual Inline Memory Module)

Assembled DIMM Naming Convention (Intel)

In order to be able to visually identify the critical parameters of a given DIMM, the following naming convention will be used.

On component or sticker on DIMM:

PCX-abc-def R
X    = MHz (X=100 for PC100-DIMM)
a    = CL value (CAS latency / cycles (must be <= 3))
b    = trcd value (RAS-to-CAS delay / cycles)
c    = trp value (RAS precharge time / cycles)
d    = tac value (data output valid after / ns)
e    = spd rev# (SPD-EEPROM-version / 2 = rev. 1.2 (or 012))
f    = reserved (always 0)
R    = registered (R = buffered DIMM or w/o -R- for unbuffered DIMM)


Example - 1: PC100-322-620
100MHz, CAS latency = 3 cycles, RAS-CAS delay = 2 cycles, RAS precharge = 2 cycles,
data out valid after 6 ns, revision 1.2, unbuffered DIMM.

Example - 2: PC100-322-60120
100MHz, CAS latency = 3 cycles, RAS-CAS delay = 2 cycles, RAS precharge = 2 cycles,
data out valid after 6 ns, revision 1.2, unbuffered DIMM.


 

PS/2 72-Pin SIMMs (for M/T 85xx/95xx)
A set of 4-Bits shows the state of the presence detect signals for a specific memory connector. The setting of the presence-detect bits is determined trough registers (x'00E8' and x'00E9').

Not all of the following Memory-modules are supported by every IBM computer.


  Pin 72 to Pin 70, 69, 68 and 67 ( X = connected to GND)

Presence-Detect Bits table

Bits.
3 2 1 0		 Measure
-ment		 Single Inline Memory - Module Definition
1101 ..X. 32MB 60-ns Industry standard
1001 .XX. 32MB 70-ns Industry standard
0101 X.X. 32MB 80-ns Industry standard
1110 ...X 16MB 60-ns Industry standard
1010 .X.X 16MB 70-ns IBM and Industry standard
0110 X..X 16MB 80-ns Industry standard
1011 .X.. 8MB 70-ns IBM and Industry standard
1000 .XXX 8MB 80-ns IBM and Industry standard
1000 .XXX 4MB 70-ns Industry standard
0100 X.XX 4MB 70-ns IBM
0100 X.XX 4MB 80-ns Industry standard
0000 XXXX 4MB 80-ns IBM
1001 .XX. 2MB 70-ns Industry standard
1100 ..XX 2MB 70-ns IBM
0101 X.X. 2MB 80-ns Industry standard
1001 .XX. 2MB 80-ns IBM
0101 X.X. 2MB 85-ns IBM
1110 ...X 2MB 100-ns IBM
1010 .X.X 1MB 70-ns Industry standard
0110 X..X 1MB 80-ns Industry standard
0110 X..X 1MB 85-ns IBM
0010 XX.X 1MB 100-ns IBM
1111   Connector is empty

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