See Asset EEPROM backup - before start, replacing System Board.
The following tables contain switchand jumper setting information.
(D) indicates the default setting.
Processor Speed Switch Setting (SW1 1-4)
| Speed | SW1-1 | SW1-2 | SW1-3 | SW1-4 |
|---|---|---|---|---|
| 350 MHz | Off | Off | ON | ON |
| 400 MHz | ON | ON | Off | ON |
| 450 MHz | Off | On | Off | On |
Normal ROM Operation Switch (SW1 5)
| ROM Operation | SW1-5 |
|---|---|
| Normal | Off (D) |
| ROM Recovery Mode | On |
Enet Normal Operation Switch (SW1 6)
| Enet Operation | SW1-6 |
|---|---|
| Normal | Off (D) |
| Enet Disabled | On |
Admin Password Lock Switch (SW1 7)
| Admin Password | SW1-7 |
|---|---|
| Locked | Off (D) |
| Unlocked | On |
Diskette Operation Switch (SW1 8)
| Diskette Operation | SW1-8 |
|---|---|
| Normally | Off (D) |
| Read Only | On |
Clear CMOS Request Jumper Setting (J7E1)
| Jumper | Setting | Description |
|---|---|---|
| J7E1 | 1-2(D) | Normal Operation |
| J7E1 | 2-3 | Erase Password Configuration (Clear CMOS) |
See > System Board Memory
for DIMM size, speed, and type.
DIMM sizes of 32, 64, 128, and 256 MB are acceptable. Use 100MHz, SDRAM DIMMs.
Do not mix Registered and Non-Registered DIMMs. When installing or removing memory, any
sequence of DIMM size is allowed.
Fill each DIMM connector sequentially, starting at DIMM socket 0. If SDRAM ECC and SDRAM (non-parity) DIMMs are
mixed, they will configure as non-parity ECC.
Install only SDRAM ECC DIMMs to enable ECC.
Please see the LEGAL - Trademark notice.
Feel free - send a 
for any BUG on this page found - Thank you.