CHECKPOINT Output (Display CP:xx)

^{IBM-AUSTRIA - PC-HW-Support 30 Aug 1999}

CHECKPOINT Output (Display CP:xx)

CP : xx state/meaning, shown during Machine initialization (POST phase 1 and 2)

CP output during Stage 1 POST

CP code    Description

01    Disable clock interrupts, turn off screen, mask off parity, initialize interrupt controller, initialize error logging formats

02    Memory DMA refresh test

03    Channel reset

04    Test planar ports (94, 96, 100, 102) initialize default planar POS

05    Check CMOS/NVRAM for validity, initialize EXPRESSWAY (on Model 90 systems only)

06    Initialize dot clock

07    Enable base memory

08    Base memory testing - data integrity

09    Base memory testing - addressability

0F    Fatal base memory error - recovery not successful

10    Start up drive 80

11    Enable extended memory, initialize base memory, disable SRAM, reset parity/channel check. Initialize row, column of cursor.

12    Test protected mode

14    Initialize the 8259 interrupt controller

15    Initialize the interrupt vectors

16    Initialize BIOS interrupt vectors

17    Verify DMA transfers

18    POS setup, set CMOS clock

1A    Set divide-by-0 interrupt vector

24    Set CMOS equipment byte

25    Check for manufacturing boot request

30    Test DMA transfers

34    Protected mode Shutdown

35    Test video card type error

40    Check for video feature ROM and video presence

41    Reset parity and channel checks, load NMI vector with dummy interrupt handler, test timer, load NMI vector to POST NMI handler

42    Test interrupt mask register

43    Test interrupt mask register with device interrupt

44    Check hot interrupts

45    Check hot interrupts without I/O-memory parity enabled

46    Interrupt mask error

47    Timer 2 read/write, verify Timer 0 bits

48    Verify Timer 2 output

49    Verify Timer 0 on off bits

4A    Verify Timer 2 output

4B    Verify Timer 0 interrupt

4C    Verify Timer 0 count/refresh

4D    Verify Timer 3 NMI

4E    Check keyboard controller for last command accepted

5C    Set hardware interrupt vectors 0-7

5D    Set hardware interrupt vectors 8-15

5E    Set rest of interrupt vectors

5F    Test serial port

62    Turn on drive 0 motor

64    Test ASYNC registers, modem control lines, and data loop. If ASCII console selected - initialize ASCII console as system display device

65    Enable timer interrupts

66    Check for manufacturing boot and unmask NMI interrupts

6E    Check for system security or CE override conditions, run diskette testing and setup, go load first IML image

80    Start of IML process. SCSI POST

81    Diskette IML. Load and verify IML boot record from diskette

82    Disk IML. Load and verify IML boot record from disk

83    Diskette IML. Diskette recovery from SCSI IML failure. Load in and verify IML boot record from diskette

90 - B6    Protected mode exception

BE    Build descriptor tables for protected mode

BF    Completion of descriptor tables for protected mode

C0    Base memory addressing test, extended memory enable, base memory initialization

CA    Cache testing (tag RAM, linefill, DMA snooping)

CB    Second Group Cache Testing - L1 DMA snoop

CC    Second Group Cache Testing - L1 linefill

CD    Second Group Cache Testing - non cacheable range boundary

CE    Second Group Cache Testing - L2 DMA snoop

CF    Second Group Cache Testing - L2 linefill

EB    Dual Bus Interface Controller internal register error

F0    Protected mode initialization

F1    Test interrupts in protected mode

F2    Test exception interrupt in protected mode

F3    Verify 286 descriptor instructions in protected mode

F4    Verify 286 BOUND instruction in protected mode

F5    Verify PUSHALL/POPALL instructions in protected mode

F6    Verify ACCESSRIGHTS function in protected mode

F7    Verify ADJUSTRPL fields in protected mode

F8    Verify LOAD instructions in protected mode

F9    Verify LOAD instructions in protected mode (continued)

FA    Test low meg chip select in protected mode

CP code	Description

01	Disable clock interrupts, turn off screen, mask off parity, initialize interrupt controller, initialize error logging formats
02	Memory DMA refresh test
03	Channel reset
04	Test planar ports (94, 96, 100, 102) initialize default planar POS
05	Check CMOS/NVRAM for validity, initialize EXPRESSWAY (on Model 90 systems only)
06	Initialize dot clock
07	Enable base memory
08	Base memory testing - data integrity
09	Base memory testing - addressability
0F	Fatal base memory error - recovery not successful
10	Start up drive 80
11	Enable extended memory, initialize base memory, disable SRAM, reset parity/channel check. Initialize row, column of cursor.
12	Test protected mode
14	Initialize the 8259 interrupt controller
15	Initialize the interrupt vectors
16	Initialize BIOS interrupt vectors
17	Verify DMA transfers
18	POS setup, set CMOS clock
1A	Set divide-by-0 interrupt vector
24	Set CMOS equipment byte
25	Check for manufacturing boot request
30	Test DMA transfers
34	Protected mode Shutdown
35	Test video card type error
40	Check for video feature ROM and video presence
41	Reset parity and channel checks, load NMI vector with dummy interrupt handler, test timer, load NMI vector to POST NMI handler
42	Test interrupt mask register
43	Test interrupt mask register with device interrupt
44	Check hot interrupts
45	Check hot interrupts without I/O-memory parity enabled
46	Interrupt mask error
47	Timer 2 read/write, verify Timer 0 bits
48	Verify Timer 2 output
49	Verify Timer 0 on off bits
4A	Verify Timer 2 output
4B	Verify Timer 0 interrupt
4C	Verify Timer 0 count/refresh
4D	Verify Timer 3 NMI
4E	Check keyboard controller for last command accepted
5C	Set hardware interrupt vectors 0-7
5D	Set hardware interrupt vectors 8-15
5E	Set rest of interrupt vectors
5F	Test serial port
62	Turn on drive 0 motor
64	Test ASYNC registers, modem control lines, and data loop. If ASCII console selected - initialize ASCII console as system display device
65	Enable timer interrupts
66	Check for manufacturing boot and unmask NMI interrupts
6E	Check for system security or CE override conditions, run diskette testing and setup, go load first IML image
80	Start of IML process. SCSI POST
81	Diskette IML. Load and verify IML boot record from diskette
82	Disk IML. Load and verify IML boot record from disk
83	Diskette IML. Diskette recovery from SCSI IML failure. Load in and verify IML boot record from diskette
90 - B6	Protected mode exception
BE	Build descriptor tables for protected mode
BF	Completion of descriptor tables for protected mode
C0	Base memory addressing test, extended memory enable, base memory initialization
CA	Cache testing (tag RAM, linefill, DMA snooping)
CB	Second Group Cache Testing - L1 DMA snoop
CC	Second Group Cache Testing - L1 linefill
CD	Second Group Cache Testing - non cacheable range boundary
CE	Second Group Cache Testing - L2 DMA snoop
CF	Second Group Cache Testing - L2 linefill
EB	Dual Bus Interface Controller internal register error
F0	Protected mode initialization
F1	Test interrupts in protected mode
F2	Test exception interrupt in protected mode
F3	Verify 286 descriptor instructions in protected mode
F4	Verify 286 BOUND instruction in protected mode
F5	Verify PUSHALL/POPALL instructions in protected mode
F6	Verify ACCESSRIGHTS function in protected mode
F7	Verify ADJUSTRPL fields in protected mode
F8	Verify LOAD instructions in protected mode
F9	Verify LOAD instructions in protected mode (continued)
FA	Test low meg chip select in protected mode

CP output during Stage 2 POST

check full NVRAM errorlog, set time of day, clear descriptor tables, set POST stack, enable level 71-INT, return to overlay

CP code    Description

01    Flush cache, enable first meg of memory as cacheable, disable clock interrupts, mask off parity

0B    Write output port command

0C    Test Keyboard

0D    Write byte command to keyboard controller

0E    Keyboard error

14    Initialize the 8259 interrupt controller

15    Initialize display row count

1B    Count memory size

1C    Protect mode entered, determine extended memory size

20    Extended memory size determined, store in CMOS/NVRAM

21    Extended memory size stored, enter real mode

22    Return from count memory size

23    Set real mode stack and data area

24    Set CMOS equipment byte

34    Protected mode shutdown

35    Test video card type error

40    Initialize the video subsystem, set ASCII vectors, clear manufacturing error flags

41    Reset the data segment

4F    Determine warm start

50    Call extended memory testing

51    Protect mode entered, retrieve extended memory size

52    Address test extended memory

53    Memory test extended memory

54    Extended memory testing complete

55    Check if password is enabled

56    Keyboard and mouse testing

57    Keyboard auxiliary device test

58    Verify an interrupt is generated by the keyboard

59    Keyboard stuck key error

5A    Auxiliary device testing

5B    Reset timer, initialize keyboard

5F    Enable Keyboard interrupts

60    Enable diskette interrupt vector

61    Diskette and FDC test

62    Diskette and FDC test, diskette setup

63    Initialize the BIOS Data Area

65    Enable timer interrupts, check CMOS and battery, check for memory configuration errors

66    Initialize diskette setup

67    Enable interrupts

68    Initialize real mode data segment

69    Perform ROM scan

6A    Initialize printer parameters

6B    Set CMOS RS232, calculate usable memory values for CMOS

6C    Initialize Math Coprocessor

6D    Close window, setup keyboard, initprogs, set cache boundaries, enable cache,
6E    Cleanup tasks before leaving POST, run boot routine

6F    Boot strap loader, Interrupt 19h

70    Read primary disk/diskette boot record

71    Reset disk/diskette

72    Interrupt 18h path

73    RPL via Interrupt 18h

84 - 85    Image overlay

86    Store system partition pointer and system partition type. Return from boot record

90 - B6    Protected mode exception

BE    Build descriptor tables for protected mode

BF    Completion of descriptor tables for protected mode

D0    BASIC and VPD copies from ROM to RAM

F0    Protected mode initialization

F1    Test interrupts in protected mode

F2    Test exception interrupt in protected mode

F3    Verify 286 descriptor instructions in protected mode

F4    Verify 286 BOUND instruction in protected mode

F5    Verify PUSHALL/POPALL instructions in protected mode

F6    Verify ACCESSRIGHTS function in protected mode

F7    Verify ADJUSTRPL fields in protected mode

F8    Verify LOAD instructions in protected mode

F9    Verify LOAD instructions in protected mode (continued)

FA    Test low meg chip select in protected mode

CP code	Description

01	Flush cache, enable first meg of memory as cacheable, disable clock interrupts, mask off parity
0B	Write output port command
0C	Test Keyboard
0D	Write byte command to keyboard controller
0E	Keyboard error
14	Initialize the 8259 interrupt controller
15	Initialize display row count
1B	Count memory size
1C	Protect mode entered, determine extended memory size
20	Extended memory size determined, store in CMOS/NVRAM
21	Extended memory size stored, enter real mode
22	Return from count memory size
23	Set real mode stack and data area
24	Set CMOS equipment byte
34	Protected mode shutdown
35	Test video card type error
40	Initialize the video subsystem, set ASCII vectors, clear manufacturing error flags
41	Reset the data segment
4F	Determine warm start
50	Call extended memory testing
51	Protect mode entered, retrieve extended memory size
52	Address test extended memory
53	Memory test extended memory
54	Extended memory testing complete
55	Check if password is enabled
56	Keyboard and mouse testing
57	Keyboard auxiliary device test
58	Verify an interrupt is generated by the keyboard
59	Keyboard stuck key error
5A	Auxiliary device testing
5B	Reset timer, initialize keyboard
5F	Enable Keyboard interrupts
60	Enable diskette interrupt vector
61	Diskette and FDC test
62	Diskette and FDC test, diskette setup
63	Initialize the BIOS Data Area
65	Enable timer interrupts, check CMOS and battery, check for memory configuration errors
66	Initialize diskette setup
67	Enable interrupts
68	Initialize real mode data segment
69	Perform ROM scan
6A	Initialize printer parameters
6B	Set CMOS RS232, calculate usable memory values for CMOS
6C	Initialize Math Coprocessor
6D	Close window, setup keyboard, initprogs, set cache boundaries, enable cache,
6E	Cleanup tasks before leaving POST, run boot routine
6F	Boot strap loader, Interrupt 19h
70	Read primary disk/diskette boot record
71	Reset disk/diskette
72	Interrupt 18h path
73	RPL via Interrupt 18h
84 - 85	Image overlay
86	Store system partition pointer and system partition type. Return from boot record
90 - B6	Protected mode exception
BE	Build descriptor tables for protected mode
BF	Completion of descriptor tables for protected mode
D0	BASIC and VPD copies from ROM to RAM
F0	Protected mode initialization
F1	Test interrupts in protected mode
F2	Test exception interrupt in protected mode
F3	Verify 286 descriptor instructions in protected mode
F4	Verify 286 BOUND instruction in protected mode
F5	Verify PUSHALL/POPALL instructions in protected mode
F6	Verify ACCESSRIGHTS function in protected mode
F7	Verify ADJUSTRPL fields in protected mode
F8	Verify LOAD instructions in protected mode
F9	Verify LOAD instructions in protected mode (continued)
FA	Test low meg chip select in protected mode

More INFORMATION / HELP is available at the IBM-HelpCenter

Please see the LEGAL - Trademark notice.
Feel free - send a for any BUG on this page found - Thank you.