|DRQ 0 ( 8-bit)||User Available (Business audio)|
|DRQ 1 ( 8-bit)||User Available (Business audio or LAN)|
|DRQ 2 ( 8-bit)||DISKETTE DRIVE|
|DRQ 3 ( 8-bit)||User Available
(Business audio, LPTx - ECP or EPP mode)
|DRQ 4||RESERVED (cascade channel)
|DRQ 5 (16-bit)||User Available (ISA bus)|
|DRQ 6 (16-bit)||User Available (ISA bus)|
|DRQ 7 (16-bit)||User Available (ISA bus / 6384 P60/D Hard Disk)|
Typical IRQ Assignments
|SMI||System/Power Management IRQ||--|
|NMI||Parity Error or I/O Channel check||--|
|IRQ 0||Interval Timer||--|
|IRQ 1||Keyboard bffr.-full||--|
|IRQ 2||Cascade IRQ-req. (IRQ-8 to IRQ-15)||--|
|IRQ 8||Real Time Clock||--|
|IRQ 9||Redirect Cascade to IRQ 2 (User Available)||8/16|
|IRQ 10||User Available||16|
|IRQ 11||User Available (2137-SL A - USB)||16|
|IRQ 12||Auxiliary device (Mouse) (User Available)||16|
|IRQ 13||Math Coprocessor exception||--|
|IRQ 14||Hard Disk (Primary IDE)||16|
|IRQ 15||Secondary IDE (User Available)
Used by NOVELL, if installed.
|IRQ 5||LPT2: / Sound Card
|IRQ 6||Diskette drive controller||8/16|
|IRQ 7||LPT1: (User Available, if shareable)||8/16|
An IRQ or interrupt request, is the process whereby an input or output device tells the CPU to temporarily interrupt whatever it is doing and immediately process something from the source of the interrupt. When finished the CPU goes back to what it was already processing. There are 16 IRQs (IRQ 0 trough IRQ 15) in the ISA bus design. Devices that need an IRQ line to operate sometimes must have the use of that line exclusively.
Many expansion cards require the use of an IRQ line to operate, e.g. network interface cards and sound cards. When you install a card that uses an IRQ, it will have a default IRQ setting that you might need to change if that IRQ is already in use and cannot be shared. There are different ways of setting an IRQ assignment, with jumpers being the most common.
Both the ISA bus and the PCI bus use the same set of system IRQs. For the PCI bus there is an additional consideration. On the PCI bus, you must assign an IRQ to the PCI slot you will install an IRQ-using card in. There are two methods of generating an IRQ on the PCI bus, level-triggering (level sensitive) and edge-triggering . Most PCI expansion cards use the level-triggered design. Some very few PCI cards may use the edge-triggered method. Once more... HW-IRQs are level-sensitive in systems using the PCI bus architecture and are edge-triggered in systems using the PC-type I/O architecture. The interrupt controller clears its-in service register bit when the interrupt routine sends an End-of-Interrupt EOI command to the controller. The EOI command is sent regardless of whether the incoming interrupt request to the controller is active or inactive.
In systems using level-sensitive interrupts, the interrupt-in progress latch is readable at an I/O-address bit position. This latch is read during the interrupt service routine and might be reset by the read operation or it might require an explicit reset.
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