DELHI-III º¸µåÀÇ Á¡ÆÛ ¼³Á¤

 
CPU VCC ¼³Á¤(J15 ¹ø°ú °°ÀÌ Á¶ÀÛÇؾßÇÔ)

VCC

SW1 SW2 SW3 SW4
2.2V OFF ON OFF OFF
2.8V OFF OFF OFF ON
2.9V ON OFF OFF ON
3.2V OFF OFF ON ON
3.3V ON OFF ON ON
3.4V OFF ON ON ON
3.5V ON ON ON ON
J15

CUP TYPE

1-2

IOVCC = CoreVCC( single CPU Power source )

2-3

IOVCC = 3.3V( dual CPU Power source )

Jumper 100§Ö 75§Ö
  J2  1-2 1-2
  J3  1-2 2-3
  J4  1-2 2-3
  J5  1-2 1-2
  J9  2-3 1-2
  J11  2-3 1-2
  J12  2-3 1-2
  J13  1-2 1-2
CPU Vender CPU Model IOVCC CoreVCC Remarks
Intel P54C/P54CS 3.5V(VRE) IOVCC IOVCC=CoreVCC
3.4V(STD) IOVCC IOVCC=CoreVCC
P55C-MMX 3.3V 2.8V
AMD K5 3.5V(VRE) IOVCC IOVCC=CoreVCC
3.4V(STD) IOVCC IOVCC=CoreVCC
K6-PR233(0.35um) 3.2V 3.3V
K6-166/200(0.35um) 2.9V 3.3V
K6-233/266/300(0.25um) 2.2V 3.3V
K6-2-300/333/350(0.25um) 2.2V 3.3V
IBM/Cyrix 6x86 3.5V(VRE) IOVCC IOVCC=CoreVCC
6x86MX 2.9V 3.3V
M-II 2.9V 3.3V
IDT WinChip C6(0.35um) 3.5V IOVCC IOVCC=CoreVCC
3.3V IOVCC IOVCC=CoreVCC
WinChip 2-3D(0.25um) 2.8V 3.3V
 ±â´É ¹× DIP S/W ¼³Á¤
±â ´É Á¡ÆÛ ¼³Á¤
CMOS Clear SW5 Clear »ç¿ëÇÔ
ON OFF
PASSWORD SW6 »ç¿ëÇÔ Clear
ON OFF
CMOS Setup SW7 »ç¿ëÇÔ »ç¿ë ¾ÈÇÔ
ON OFF
FDD Write protect SW8 »ç¿ë ¾ÈÇÔ »ç¿ëÇÔ
ON OFF
On-Board AGP »ç¿ë J10    1-2   2-3
»ç¿ë ¾ÈÇÔ »ç¿ëÇÔ
L2 Cache »ç¿ë( J14 ) J14         1-2         2-3
¿ÜºÎ(L2) Cache »ç¿ë ³»ºÎ(L1) Cache »ç¿ë
 ¸Þ¸ð¸® Ŭ·° ¼³Á¤
±â ´É Á¡ÆÛ ¼³Á¤
CMOS Clear SW5 Clear »ç¿ëÇÔ
ON OFF
PASSWORD SW6 »ç¿ëÇÔ Clear
ON OFF
CMOS Setup SW7 »ç¿ëÇÔ »ç¿ë ¾ÈÇÔ
ON OFF
FDD Write protect SW8 »ç¿ë ¾ÈÇÔ »ç¿ëÇÔ
ON OFF
On-Board AGP »ç¿ë J10    1-2   2-3
»ç¿ë ¾ÈÇÔ »ç¿ëÇÔ
L2 Cache »ç¿ë( J14 ) J14         1-2         2-3
¿ÜºÎ(L2) Cache »ç¿ë ³»ºÎ(L1) Cache »ç¿ë
J16 J17 ¸Þ¸ð¸® ÁÖÆļö ¼±Åà ¸Þ¸ð¸® ŸÀÔ
2-3 1-2 66MHz Only 66MHz & 100MHz SDRAM, EDO
1-2 2-3 CPU Clock¿¡ µû¸§(66/75/83/95/100MHz) 100MHz SDRAM Only